Name
Abstract | ||
|---|---|---|
Caches are very inefficiently utilized because not all the excess data brought into the cache, to exploit spatial locality, is utilized. Our experiments showed that Level 1 data cache has a utilization of only about 57%. Increasing the efficiency of the cache (by increasing its utilization) can have significant benefits in terms of reducing the cache energy consumption, reducing the bandwidth requirement, and making more cache space available for the useful data. In this paper, we focus on prediction mechanisms to predict the useless data in a cache block (cache noise), so that only the useful data is brought into the cache on a cache miss. The prediction mechanisms consider the words usage history of cache blocks for predicting the useful data. We obtained a predictability of about 95% with a simple last words usage predictor. When applying cache noise prediction to L1 data cache, we observed about 37% improvement in cache utilization, and about 23% and 28% reduction in cache energy consumption and bandwidth requirement, respectively. Cache noise mispredictions increased the miss rate by 0.1% and had almost no impact on instructions per cycle (IPC) count. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1109/TC.2008.75 | IEEE Trans. Computers |
Keywords | Field | DocType |
cache space,cache noise mispredictions,useful data,cache noise,data cache,cache utilization,cache block,cache noise prediction,cache energy consumption,l1 data cache,dynamic scheduling,instructions per cycle,superscalar | Cache invalidation,Cache pollution,Computer science,Cache,CPU cache,Parallel computing,Cache algorithms,Real-time computing,Cache coloring,Bus sniffing,Smart Cache | Journal |
Volume | Issue | ISSN |
57 | 10 | 0018-9340 |
Citations | PageRank | References |
3 | 0.41 | 19 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Prateek Pujara | 1 | 30 | 2.80 |
| Aneesh Aggarwal | 2 | 202 | 16.91 |