Name
Abstract | ||
|---|---|---|
Reduction circuits are used to reduce rows of floating point values to single values. Binary floating point operators often have deep pipelines, which may cause hazards when many consecutive rows have to be reduced.We present an algorithm by which any number of consecutive rows of arbitrary lengths can be reduced by a pipelined commutative and associative binary operator in an efficient manner. The algorithm is simple to implement, has a low latency, produces results in-order, and requires only small buffers. Besides, it uses only a single pipeline for the involved operation.The complexity of the algorithm depends on the depth of the pipeline, not on the length of the input rows.In this paper we discuss an implementation of this algorithm and we prove its correctness. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/DSD.2009.141 | DSD |
Keywords | Field | DocType |
streaming reduction circuit,binary adder,floating point value,floating point,floating point arithmetic,nickel,data mining,adders,low latency,pipelines,indexes,field programmable gate arrays | Row,Adder,Commutative property,Floating point,Computer science,Parallel computing,Correctness,Operator (computer programming),Latency (engineering),Binary number | Conference |
Citations | PageRank | References |
2 | 0.39 | 7 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Marco Gerards | 1 | 27 | 2.64 |
| Jan Kuper | 2 | 92 | 8.75 |
| André Kokkeler | 3 | 89 | 12.71 |
| Bert Molenkamp | 4 | 7 | 2.37 |