Name
Abstract | ||
|---|---|---|
This paper focuses on a class of problem relating to the multiplication of a single number by several coefficients that, while not constant, are drawn from a finite set of constants that change with time. To minimize the number of operations, we present the formulation as a form of common sub-expression elimination. The proposed scheme avoids the implementation of full multiplication. In addition, an efficient implemenation is presented targeting the Xilinx Virtex/Virtex-II family of FPGAs. We also introduce a novel use of Integer Linear Programming for finding solutions to the minimum-cost of such a multiplication problem. Our formulation results in area savings even for modest problem sizes. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1007/978-3-540-30117-2_39 | Lecture Notes in Computer Science |
Field | DocType | Volume |
Finite set,Computer science,Parallel computing,Data-flow analysis,Circuit design,Field-programmable gate array,Integer programming,Multiplication,Linear programming,Virtex | Conference | 3203 |
ISSN | Citations | PageRank |
0302-9743 | 4 | 0.47 |
References | Authors | |
6 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Nalin Sidahao | 1 | 4 | 1.49 |
| George A. Constantinides | 2 | 1391 | 160.26 |
| Peter Y. K. Cheung | 3 | 1720 | 208.45 |