Title
Probabilistic memory disambiguation and its application to data speculation
Abstract
Memory references in an instruction stream often pose a challenge for performance improvements on high-per- formance microprocessors. One common scenario is that a load and a sequence of dependent instructions are on a critical path, but scheduling these instructions early to reduce the critical path length is often hindered by a preceding store, which may write to the same memory location as the load. A traditional memory disambigua- tion approach employed by a compiler may break such a potential dependence only if it can successfully disam- biguate the memory locations referenced by the store and the load. This conservative treatment in memory disambiguation is greatly alleviated by a recent architec- tural support for data speculation. With such a support, a load can be freely moved up across an aliasing store, and if the alias does occur, it is detected by a run time check and a recovery code will be invoked to re-execute the speculated instructions. Data speculation opens up exciting new opportunities for performance improve- ments, but it also demands a new memory disambigua- tion technique to guide this transformation with aliasing probabilities as the performance of unguided specula- tions will be greatly penalized by the cost of running recovery code. This paper presents a probabilistic memory disam- biguation (PMD) framework to statically derive the symbolic probabilities of the aliases among array refer- ences in application programs. We show how to apply this framework to build a profitability cost model to guide data speculation in a compiler. We also provide a set of heuristics to quickly approximate the aliasing probabilities in many common cases. Experimental results show that data speculation can often give a 1.1 to 1.2 performance speedup, but unguided data speculation may also cause a two to three fold slowdown. Therefore, it is important to guide data speculation with a cost model like the PMD framework to maximize program performance.
Year
DOI
Venue
1999
10.1145/309758.309769
SIGARCH Computer Architecture News
Keywords
DocType
Volume
critical path,profitability
Journal
27
Issue
Citations 
PageRank 
1
11
1.06
References 
Authors
6
3
Name
Order
Citations
PageRank
Roy Dz-ching Ju132621.37
Jean-François Collard224721.24
Karim Oukbir3636.60