Name
Abstract | ||
|---|---|---|
Many-core chip design has become a popular means to sustain the exponential growth of chip-level computing performance. The main advantage lies in the exploitation of parallelism, distributively and massively. Consequently, the on-chip communication fabric becomes the performance determinant. In the meantime, the introduction of Ultra-Wideband (UWB) interconnect brings in the new opportunity for giga-bps communication bandwidth, milliwatts communication power, and low cost implementation for millimeter range on-chip communication for future chip generations. In this paper, we study multi-channel wireless Network-on-Chip (McWiNoC) with ultra-short RF/wireless links for multi-hop communication. We first present the benefit of high bandwidth, low latency and flexible topology configurations provided by this new on-chip inter-connection network. We then propose a distributed and deadlock-free location based routing scheme. We further design an efficient channel arbitration scheme to grant multi-channel access. With a few representative synthetic traffic patterns and SPLASH-II benchmarks, we demonstrate that McWiNoC can achieve 23.3% average performance improvement and 65.3% average end-to-end latency reduction over a baseline NoC of 8 × 8 metal wired mesh. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1145/1999946.1999975 | NOCS |
Keywords | Field | DocType |
chip-level computing performance,multi-channel wireless,many-core chip design,performance determinant,on-chip communication capacity,multi-hop communication,design,millimeter range on-chip communication,new on-chip interconnection network,average performance improvement,on-chip communication fabric,giga-bps communication bandwidth,milliwatts communication power,exponential growth,routing,chip,topology,low latency,wireless network,fault tolerance,system on a chip,wireless communication,radio frequency,ultra wideband | Wireless,System on a chip,Computer science,Computer network,Communication channel,Chip,Integrated circuit design,Latency (engineering),Location-based routing,Performance improvement | Conference |
ISBN | Citations | PageRank |
978-1-4503-0720-8 | 10 | 0.58 |
References | Authors | |
13 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Dan Zhao | 1 | 188 | 15.29 |
| Yi Wang | 2 | 144 | 10.65 |
| Jian Li | 3 | 517 | 28.49 |
| Takamaro Kikkawa | 4 | 69 | 14.32 |