Name
Abstract | ||
|---|---|---|
Synchronous Data Flow Graphs (SDFGs) are a useful tool for modeling and analyzing embedded data flow applications, both in a single processor and a multiprocessing context or for application mapping on platforms. Throughput analysis of these SDFGs is ... |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/ACSD.2006.24 | ACSD |
Keywords | Field | DocType |
embedded systems,formal verification,scheduling,synchronisation,Assert European integrated project,GALS,asynchronous system,deadline-driven task scheduling,embedded application,formal verification,quasi-synchronous periodic process,synchronous model | Asynchronous communication,Synchronization,Embedded software,Asynchronous system,Computer science,Synchronizer,Real-time computing,Concurrent computing,Application software,Formal verification,Distributed computing | Conference |
ISBN | Citations | PageRank |
0-7695-2556-3 | 13 | 0.72 |
References | Authors | |
17 | 2 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Nicolas Halbwachs | 1 | 3957 | 426.43 |
| Louis Mandel | 2 | 13 | 0.72 |