Name
Abstract | ||
|---|---|---|
This paper presents a VLSI architecture specifically designed as a video/communication controller to support emerging applications in the area of video/data communications. The controller is a parallel architecture consisting of three (3) processing modules, a shared memory with four (4) banks and two (2) input/output modules and operating at the transfer speed of 622 Mbits/sec. The processing modules and memory banks communicate through a low cost interconnection scheme able though to perform at system's required data transfer rate. The entire system constitutes a component which can accommodate a switching system as an intelligent buffer with real time processing and multiplexing capabilities. The component performs operations on fixed and/or variable length packets of data on a stream basis. The architecture embeds both the processing and the memory modules, thus producing a “system on a chip” solution. |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1023/A:1011121709723 | VLSI Signal Processing |
Keywords | Field | DocType |
video communication,traffic shaping,packet networks,parallel architectures,shared memory,interconnection networks | Data rate units,Memory bank,Control theory,System on a chip,Shared memory,Computer science,Network packet,Parallel computing,Real-time computing,Multiplexing,Very-large-scale integration | Journal |
Volume | Issue | ISSN |
28 | 3 | 0922-5773 |
Citations | PageRank | References |
3 | 0.57 | 14 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Gr. Doumenis | 1 | 3 | 0.57 |
| G. Konstantoulakis | 2 | 3 | 0.57 |
| G. Korinthios | 3 | 7 | 1.08 |
| G. Lykakis | 4 | 10 | 2.62 |
| D. Reisis | 5 | 17 | 4.23 |
| G. Synnefakis | 6 | 5 | 1.35 |