Name
Abstract | ||
|---|---|---|
This paper presents a continuous-time quadrature bandpass ΔΣ ADC that achieves 60dB DR and 67.4dB SFDR at 1MHz BW and 1MHz IF. The modulator uses capacitive feedforward architecture for the 3rd order loop filter for reduced power consumption and a local feedback loop for optimized noise shaping within the required band. The design is targeted for low power low IF receivers and it achieves a total power consumption of 1.7mW from 1.2V supply. The chip is fabricated with UMC 0.13μm technology. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/ISCAS.2013.6572027 | ISCAS |
Keywords | Field | DocType |
low power low if receiver,network synthesis,local feedback loop,capacitive feedforward architecture,feedforward,frequency 1 mhz,power consumption,noise figure 60 db,analogue-digital conversion,umc technology,dr,voltage 1.2 v,modulator,noise shaping optimization,circuit noise,3rd order loop filter,bw,circuit feedback,noise figure 67.4 db,low-power electronics,delta-sigma modulation,continuous-time quadrature bandpass δς adc,filters,if,bandwidth 1 mhz,size 0.13 mum,power 1.7 mw,radio frequency,bluetooth,delta sigma modulation,feedforward neural networks,modulation,low power electronics | Band-pass filter,Control theory,Computer science,Network synthesis filters,Delta-sigma modulation,Spurious-free dynamic range,Electronic engineering,Feedback loop,Noise shaping,Low-power electronics,Feed forward | Conference |
ISSN | ISBN | Citations |
0271-4302 | 978-1-4673-5760-9 | 0 |
PageRank | References | Authors |
0.34 | 4 | 7 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Aytac Atac | 1 | 3 | 2.48 |
| Lei Liao | 2 | 3 | 2.19 |
| Yifan Wang | 3 | 35 | 11.82 |
| Martin Schleyer | 4 | 2 | 1.09 |
| Ye Zhang | 5 | 4 | 8.85 |
| Ralf Wunderlich | 6 | 76 | 27.94 |
| Stefan Heinen | 7 | 15 | 4.67 |