Name
Abstract | ||
|---|---|---|
The primary objective of the study is to automate the generation of a flexible memory sub-system to handle dynamic memory accesses. A secondary objective of the study is to evaluate and develop transformations for high-level design descriptions, due to the larger impact that these transformations have at high level of abstractions (Wilton, et al, 2005) over lower levels, as well as the need to maintain design time |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/FPL.2006.311349 | FPL |
Keywords | Field | DocType |
reconfigurable platforms,cache storage,automatic generation,reconfigurable architectures,dynamic memory sub-system,automatic test pattern generation,dynamic memory access,high-level design description transformation,logic design,flexible memory sub-system,high level synthesis | Dynamic random-access memory,Logic synthesis,Automatic test pattern generation,Computer architecture,Abstraction,Computer science,Parallel computing,High-level synthesis,Real-time computing,Memory management,Embedded system | Conference |
ISSN | ISBN | Citations |
1946-1488 | 1-4244-0312-X | 0 |
PageRank | References | Authors |
0.34 | 4 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Su-shin Ang | 1 | 61 | 5.29 |
| George A. Constantinides | 2 | 1391 | 160.26 |