Paper Info
Title
Architecture And Physical Implementation Of Reconfigurable Multi-Port Physical Unclonable Functions In 65 Nm Cmos
Abstract
In modem cryptographic systems, physical unclonable functions (PUFs) are efficient mechanisms for many security applications, which extract intrinsic random physical variations to generate secret keys. The classical PUFs mainly exhibit static challenge-response behaviors and generate static keys, while many practical cryptographic systems need reconfigurable PUFs which allow dynamic keys derived from the same circuit. In this paper, the concept of reconfigurable multi-port PUFs (RM-PUFs) is proposed. RM-PUFs not only allow updating the keys without physically replacement, but also generate multiple keys from different ports in one clock cycle. A practical RM-PUFs construction is designed based on asynchronous clock and fabricated in TSMC low-power 65 nm CMOS process. The area of test chip is 1.1 mm(2), and the maximum clock frequency is 0.8 GHz at 1.2 V. The average power consumption is 27.6 mW at 27 degrees C. Finally, test results show that the RM-PUFs generate four reconfigurable 128-bit secret keys, and the keys are secure and reliable over a range of environmental variations such as supply voltage and temperature.
Year
DOI
Venue
2013
10.1587/transfun.E96.A.963
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES
Keywords
Field
DocType
RM-PUFs, reconfigurable, Multi-port, asynchronous clock, 65 nm
Asynchronous communication,Architecture,Cryptography,CMOS,Chip,Physical unclonable function,Cycles per instruction,Mathematics,Clock rate,Embedded system
Journal
Volume
Issue
ISSN
E96A
5
0916-8508
Citations 
PageRank 
References 
2
0.39
11
Authors
6
Name
Order
Citations
PageRank
Pengjun Wang16211.93
Yuejun Zhang22911.03
Jun Han39124.48
Zhiyi Yu48118.24
Yibo Fan513025.97
Zhang Zhang661.51