Name
Abstract | ||
|---|---|---|
This paper describes a 12-bit 300 MHz CMOS DAC for high-speed system applications. The proposed DAC consists of a unit current-cell matrix for 8 MSBs and a binary-weighted array for 4 LSBs. In order to ensure the linearity of DAC, a double Centro symmetric current matrix is designed by using the Q(2) random walk strategy. To minimize the feedthrough and improve the dynamic performance, the drain of the switching transistors is isolated from the output lines by adding two cascoded transistors. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/ISCAS.2006.1692857 | 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS |
Keywords | Field | DocType |
null | Matrix (mathematics),Computer science,Linearity,12-bit,CMOS,Symmetric matrix,Electronic engineering,Decoding methods,Transistor,Electrical engineering,Feedthrough | Conference |
Volume | Issue | ISSN |
null | null | 0271-4302 |
Citations | PageRank | References |
4 | 0.76 | 1 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Weining Ni | 1 | 9 | 1.85 |
| Xueyang Geng | 2 | 31 | 4.25 |
| Yin Shi | 3 | 4 | 1.10 |
| Foster F. Dai | 4 | 20 | 6.51 |