Name
Abstract | ||
|---|---|---|
Cyclic shifters are required in many central parts of microprocessors and floating-point units. The main difficulty in conventional cyclic shifter designs are the long internal wire connections. For this reason we propose cyclic shifter layouts that improve the accumulated wire length on the critical path by rearranging the placement of the logical gates. We can show that in this way the wire length complexity on the critical path can be reduced from O(n log(n)) in conventional designs to O(n) in our optimized designs where n is the width of the shifted operand. For the practical case of n = 64 we shorten the accumulated wire length on the critical path by a factor of 2:20. In the same design the maximal size of a net that has to be driven by a single gate is cut down by a factor of 1:86. This leads to faster cyclic shifter designs with less power consumption. |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1109/ICVD.2001.902682 | VLSI Design |
Keywords | Field | DocType |
circuit layout CAD,floating point arithmetic,integrated circuit layout,logic CAD,microprocessor chips,wiring,accumulated wire length,critical path,cyclic shifters,floating-point units,internal wire connections,maximal size,microprocessors,placement,power consumption,shifted operand,wire length complexity | Integrated circuit layout,Logic gate,Floating point,Computer science,Operand,Electronic engineering,Critical path method,Energy consumption,Power consumption | Conference |
ISBN | Citations | PageRank |
0-7695-0831-6 | 5 | 0.71 |
References | Authors | |
2 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Mark A. Hillebrand | 1 | 200 | 15.17 |
| Thomas Schurger | 2 | 5 | 0.71 |
| Peter-Michael Seidel | 3 | 177 | 21.51 |