Abstract | ||
---|---|---|
Real-time logic (RTL) has been successful in specifying and verifying a class of timing requirements in real-time systems. The authors propose a graph proof procedure for RTL formulae. First, they represent the RTL formulae in a connection graph-like structure. Based on this graph, they have found some useful deduction rules and reduction rules. From some preliminary experiments, they show that their proof procedure is very efficient |
Year | DOI | Venue |
---|---|---|
1992 | 10.1109/SEKE.1992.227975 | SEKE |
Keywords | Field | DocType |
inference mechanisms,real time logic,graph proof procedure,connection graph-like structure,verification,specification,timing requirements,reduction rules,formal logic,deduction rules,real-time systems,formal specification,formal verification,temperature,connected graph,control systems,real time systems,logic programming,logic,digital control | Graph,Computer science,Theoretical computer science,Formal specification,Control system,Logic programming,Proof procedure,Real time logic,Digital control,Formal verification | Conference |
Citations | PageRank | References |
0 | 0.34 | 10 |
Authors | ||
2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Jung-hong Kao | 1 | 2 | 1.10 |
Lawrence J. Henschen | 2 | 478 | 280.94 |