Paper Info
Title
Stochastic Testing Method for Transistor-Level Uncertainty Quantification Based on Generalized Polynomial Chaos
Abstract
Uncertainties have become a major concern in integrated circuit design. In order to avoid the huge number of repeated simulations in conventional Monte Carlo flows, this paper presents an intrusive spectral simulator for statistical circuit analysis. Our simulator employs the recently developed generalized polynomial chaos expansion to perform uncertainty quantification of nonlinear transistor circuits with both Gaussian and non-Gaussian random parameters. We modify the nonintrusive stochastic collocation (SC) method and develop an intrusive variant called stochastic testing (ST) method. Compared with the popular intrusive stochastic Galerkin (SG) method, the coupled deterministic equations resulting from our proposed ST method can be solved in a decoupled manner at each time point. At the same time, ST requires fewer samples and allows more flexible time step size controls than directly using a nonintrusive SC solver. These two properties make ST more efficient than SG and than existing SC methods, and more suitable for time-domain circuit simulation. Simulation results of several digital, analog and RF circuits are reported. Since our algorithm is based on generic mathematical models, the proposed ST algorithm can be applied to many other engineering problems.
Year
DOI
Venue
2013
10.1109/TCAD.2013.2263039
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Keywords
DocType
Volume
intrusive stochastic galerkin method,integrated circuit testing,digital circuit,statistical circuit analysis,uncertainty quantification,chaos,transistor circuits,analogue integrated circuits,time-domain circuit simulation,nonintrusive stochastic collocation,monte carlo methods,stochastic circuit simulation,rf circuit,stochastic testing method,radiofrequency integrated circuits,variation analysis,intrusive spectral simulator,transistor-level uncertainty quantification,stochastic testing,time-domain analysis,coupled deterministic equations,nongaussian random parameters,integrated circuit design,generalized polynomial chaos,nonlinear transistor circuits,analog circuit,flexible time step size control,sg method,monte carlo flows,galerkin method,circuit simulation,generic mathematical models
Journal
32
Issue
ISSN
Citations 
10
0278-0070
22
PageRank 
References 
Authors
1.08
15
4
Name
Order
Citations
PageRank
Zheng Zhang112512.54
Tarek A. El-Moselhy2919.34
Ibrahim M. Elfadel324244.16
Luca Daniel449750.96