Name
Abstract | ||
|---|---|---|
An approach to switched-current filter design based on digital multiply-accumulator and delay blocks is presented. The characteristics of the filter are made fully programmable by simply changing the ratios of the coefficient transistors, To reduce the effect of switch charge injection and channel-length modulation, a high-performance, single-ended differential, switched-current memory cell is developed and used as a basic building block. To reduce the chip area and to maintain the required accuracy of the coefficients, an array consisting of three different sizes of transistors is designed instead of using a unit transistor array as coefficient transistors. An experimental prototype infinite impulse response filter array consisting of six second order switched-current sections is designed and fabricated with a standard 1.2-mu CMOS process technology. A hard-wiring technique is used to program the filters. The test results show that the characteristics of the filters satisfy the design requirements. |
Year | DOI | Venue |
|---|---|---|
1999 | 10.1109/4.753688 | IEEE Journal of Solid-state Circuits |
Keywords | DocType | Volume |
CMOS digital integrated circuits,IIR filters,programmable filters,switched current circuits,1.2 micron,CMOS technology,channel length modulation,coefficient transistors,delay block,design,digital multiply accumulator,hard wiring,infinite impulse response filter,programmable switched current IIR filter,single-ended differential memory cell,switch charge injection,transistor array | Journal | 34 |
Issue | ISSN | Citations |
4 | 0018-9200 | 2 |
PageRank | References | Authors |
1.02 | 0 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| M. O. Ahmad | 1 | 1157 | 154.87 |
| Shenghong Wang | 2 | 43 | 5.25 |