Title
An implementation of memory-based on-chip analogue test signal generation
Abstract
This paper presents a memory-based on-chip analogue test signal generation approach that is suitable for the test of an Analogue and Mixed-Signal (AMS) core. This core contains programmable electronic interfaces for acoustic and ultrasound transducers. The test signals that must be generated on-chip have only low or moderate frequencies (10 Hz-10 MHz). The test circuitry designed in a 0.18 μm CMOS technology includes a programmable shift-register, a clock divider, and a programmable switched-capacitor filter bank. By controlling the shift-register length and the sampling frequency, the paper shows that high quality single tone signals can be generated on chip in the band of interest.
Year
DOI
Venue
2003
10.1145/1119772.1119921
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Keywords
Field
DocType
memory-based on-chip analogue test,test circuitry,test signal,programmable electronic interface,programmable shift-register,programmable switched-capacitor filter bank,shift-register length,Hz-10 MHz,clock divider,high quality,signal generation
Transducer,Shift register,Frequency divider,Computer science,Filter bank,Sampling (signal processing),CMOS,Electronic engineering,Dividing circuits
Conference
ISBN
Citations 
PageRank 
0-7803-7660-9
0
0.34
References 
Authors
2
5
Name
Order
Citations
PageRank
Salvador Mir100.34
Luis Rolíndez200.34
C. DOMINGUES300.34
L. Rufer4356.75
Christian Domigues500.34