Paper Info
Title
Parallel and Multiplex Architecture of AES-CCM Coprocessor Implementation for IEEE 802.15.4
Abstract
The MAC layer of 802.15.4 uses the AES-CCM protocol as security mechanism, it uses the AES algorithm as the core, uses CTR mode to ensure confidentiality of data, uses CBC-MAC mode to authenticate the public information of the header in MAC frame. This paper presents an AES hardware accelerator module and two implementations of AES-CCM coprocessor: one for high throughput with parallel AES module and one for low cost with multiplex AES module. For easy of integration and portability, the coprocessor uses Avalon bus interface standard, and it is verified on Altera EP1CF324C6 FPGA platform. This design and implementation of the security coprocessor has a certain value for the generalization the wireless communication terminal hardware platform.
Year
DOI
Venue
2013
10.1109/EIDWT.2013.31
EIDWT
Keywords
Field
DocType
aes-ccm protocol,aes hardware accelerator module,aes-ccm coprocessor,data privacy,data confidentiality,mac layer,wireless communication terminal hardware platform,multiplexing,wireless sensor network,parallel architectures,aes-ccm,parallel aes module,multiplex architecture,ieee 802.15.4,ctr mode,fpga platform,avalon bus interface standard,telecommunication computing,public information authentication,zigbee,802.15.4,altera ep1cf324c6 fpga platform,co-processor,security coprocessor,access protocols,aes-ccm coprocessor implementation,multiplex,aes algorithm,cryptographic protocols,multiplex aes module,wireless sensor networks,coprocessors,cbc-mac mode,message authentication,parallel architecture,parallel
Message authentication code,Cryptographic protocol,Computer science,Field-programmable gate array,CCM mode,Hardware acceleration,Header,Coprocessor,Embedded system,IEEE 802.15
Conference
ISBN
Citations 
PageRank 
978-1-4799-2140-9
0
0.34
References 
Authors
1
3
Name
Order
Citations
PageRank
Bin Feng102.03
De-yu Qi26416.54
Han Haiwen300.34