Paper Info
Title
Compiling Techniques for Coarse Grained Runtime Reconfigurable Architectures
Abstract
In this paper we develop compilation techniques for the realization of applications described in a High Level Language (HLL) onto a Runtime Reconfigurable Architecture. The compiler determines Hyper Operations (HyperOps) that are subgraphs of a data flow graph (of an application) and comprise elementary operations that have strong producer-consumer relationship. These HyperOps are hosted on computation structures that are provisioned on demand at runtime. We also report compiler optimizations that collectively reduce the overheads of data-driven computations in runtime reconfigurable architectures. On an average, HyperOps offer a 44% reduction in total execution time and a 18% reduction in management overheads as compared to using basic blocks as coarse grained operations. We show that HyperOps formed using our compiler are suitable to support data flow software pipelining.
Year
DOI
Venue
2009
10.1007/978-3-642-00641-8_21
ARC
Keywords
Field
DocType
coarse grained operation,compiling techniques,compiler optimizations,runtime reconfigurable architecture,compilation technique,computation structure,coarse grained runtime reconfigurable,hyper operations,data flow graph,basic block,high level language,data flow software pipelining,compiler optimization,mechanical engineering,data flow,software pipelining
Computer architecture,Software pipelining,Computer science,Parallel computing,Binary decision diagram,Data-flow analysis,Optimizing compiler,Compiler,High-level programming language,Data flow diagram,Computation
Conference
Volume
ISSN
Citations 
5453
0302-9743
13
PageRank 
References 
Authors
0.91
17
5
Name
Order
Citations
PageRank
Mythri Alle1878.34
Keshavan Varadarajan21069.96
Alexander Fell3668.66
S. K. Nandy432050.83
Ranjani Narayan515521.06