Name
Abstract | ||
|---|---|---|
The primary objective of the Multimedia Router (MMR) project is the design and implementation of a compact router optimized for multimedia applications. The router is targeted for use in cluster and LAN interconnection networks, which offer different constraints and therefore differing router solutions than WANs. One of the key elements in order to achieve these goals is the scheduling algorithm. In a previous paper, the authors have proposed a link/switch scheduling algorithm capable of providing different QoS guarantees to flows as needed. This work focuses on the reduction of the hardware complexity necessary to implement such algorithm. A novel priority algorithm is presented, and its hardware complexity is compared to that of the original proposal. |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1007/3-540-47734-9_36 | ICN (2) |
Keywords | DocType | ISBN |
cost-effective hardware link scheduling,multimedia router,key element,scheduling algorithm,compact router,novel priority algorithm,router solution,different constraint,different qos guarantee,hardware complexity,lan interconnection network,multimedia,local network,scheduling,service quality,computer hardware,cost effectiveness | Conference | 3-540-42303-6 |
Citations | PageRank | References |
9 | 0.73 | 9 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| blanca caminero | 1 | 259 | 26.83 |
| C. Carrión | 2 | 48 | 4.86 |
| Francisco J. Quiles | 3 | 438 | 41.67 |
| José Duato | 4 | 3481 | 294.85 |
| Sudhakar Yalamanchili | 5 | 1836 | 184.95 |