Name
Abstract | ||
|---|---|---|
In this paper we explore a lot release policy for wafer fabs that is based on the WIP threshold of the bottleneck station. Our results show that this policy is effective in cycle time improvement while keeping the same level of throughput compared with a case where no policy is applied. The application of this policy is practical and needs less considerations compared to policies that aim at keeping the WIP constant throughout the fab. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/WSC.2011.6147911 | Winter Simulation Conference |
Keywords | Field | DocType |
discrete event simulation,semiconductor device manufacture,WIP threshold,cycle time improvement,discrete event simulation,lot release policy,wafer fabs | Wafer,Distance measurement,Bottleneck,Computer science,Simulation,Workstation,Lithography,Throughput,Discrete event simulation | Conference |
ISSN | ISBN | Citations |
0891-7736 | 978-1-4799-2077-8 | 2 |
PageRank | References | Authors |
0.53 | 2 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Raha Akhavan-Tabatabaei | 1 | 66 | 11.78 |
| Carlos F. Ruiz Salazar | 2 | 2 | 0.53 |