Title
Designing the Micro/370
Abstract
The first System/370 microprocessor, the Micro/370 is a 32-bit processor that implements 102 System/370 instructions and supportsthe emulation of the rest of the instructions. The chip is 10 mmx 10 mm with 200,000 transistor sites, fabricated with a 2-micronpolysilicon gate NMOS technology with two levels of aluminum. It is designed for 10 MHz clock at worst case and has been operatedat 18 MHz with 3W power dissipation. Design tasks included maximizing the noise margin, minimizing noise, and being able tocomplete design changes in a short time. A mixed custom and standard-cell design approach was used in a hierarchical designand verification methodology.
Year
DOI
Venue
1987
10.1109/MDT.1987.295163
IEEE Design & Test
Keywords
DocType
Volume
hierarchical designand verification methodology,mixed custom,32-bit processor,noise margin,power dissipation,mhz clock,standard-cell design approach,2-micronpolysilicon gate nmos technology,able tocomplete design change,design task
Journal
4
Issue
ISSN
Citations 
3
0740-7475
1
PageRank 
References 
Authors
0.36
2
13
Name
Order
Citations
PageRank
H. h. Chao1435.50
soohwan ong210.36
minchun tsai310.69
fenghsien warren shih410.36
K. W. Lewis510.36
J. F. Tang6685.38
cynthia a trempel710.36
h n yu810.36
P. E. McCormick910.36
c v davis1010.36
andrew l diamond1110.36
t j medve1210.36
john c l hou1310.36