Name
Abstract | ||
|---|---|---|
An asynchronous arbiter dynamically allocates a resource in response to requests from processes. Glitch-free operation when two requests arrive concurrently is possible in MOS technologies. Multiway arbitration using a request-grant-release-acknowledge protocol can be achieved by connecting together two-way arbiters (mutual exclusion and tree arbiter elements). We have devised a fast and compact design for the tree arbiter element which offers eager forward-propagation of requests. It compares favorably with a well-known design in which request propagation must wait for arbitration to complete. Our analysis and simulations also suggest that no performance improvement will be obtained by incorporating eager acknowledgment of releases. All of the designs considered in this paper are speed-independent, a formal property of a network of elements which can be taken as a positive indication of their robustness. |
Year | DOI | Venue |
|---|---|---|
1996 | 10.1109/92.544412 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
CMOS logic circuits,asynchronous circuits,flip-flops,integrated circuit design,logic design,resource allocation,CMOS design,asynchronous arbiter,dynamical resource allocation,glitch-free operation,multiway arbitration,request-grant-release-acknowledge protocol,tree arbiter element,two-way arbiters | Logic synthesis,Asynchronous communication,Arbiter,Computer science,Computer network,Real-time computing,Electronic engineering,Resource allocation,Arbitration,Mutual exclusion,Asynchronous circuit,Performance improvement | Journal |
Volume | Issue | ISSN |
4 | 4 | 1063-8210 |
Citations | PageRank | References |
20 | 2.38 | 6 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Mark B. Josephs | 1 | 302 | 35.24 |
| Jelio T. Yantchev | 2 | 24 | 3.36 |