Abstract | ||
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We propose instruction-driven slicing, a technique for annotating microprocessor descriptions at the register transfer level (RTL) in order to achieve lower power dissipation. Our technique automatically annotates existing RTL code to optimize the circuit for lowering power dissipated by switching activity. Our technique can be applied at the architectural level as well, achieving similar power gains. We demonstrate our technique on architectural and RTL models of a 32-bit OpenRISC processor (OR1200), showing power gains for the SPEC2000 benchmarks |
Year | DOI | Venue |
---|---|---|
2006 | 10.1109/DATE.2006.243858 | DATE |
Keywords | Field | DocType |
spec2000 benchmarks,power gains,similar power gain,openrisc processor,low power annotation,microprocessor descriptions,microprocessor chips,switching activity,lower power dissipation,reduced instruction set computing,low-power electronics,rtl model,architectural level,automatic insertion,instruction-driven slicing,logic design,pipelined microprocessors,power gain,32-bit openrisc processor,register transfer level,new technique,rtl code,pipeline processing,low power electronics,power dissipation,registers | Logic synthesis,OpenRISC,Computer science,Dissipation,Parallel computing,Microprocessor,Slicing,Real-time computing,Reduced instruction set computing,Register-transfer level,Low-power electronics,Embedded system | Conference |
Volume | ISSN | ISBN |
1 | 1530-1591 | 3-9810801-1-4 |
Citations | PageRank | References |
4 | 0.46 | 15 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Vinod Viswanath | 1 | 57 | 5.86 |
J. Abraham | 2 | 4905 | 608.16 |
Warren A. Hunt, Jr. | 3 | 520 | 59.18 |