Title
Limit cycle behavior in a class-AB second-order square root domain filter.
Abstract
This article shows how an unwanted limit cycle can be exhibited by a second-order CMOS companding filter. The filter employs the quasi-quadratic law of the MOS transistor in strong inversion and saturation to achieve compression together with a class-AB topology to extend the dynamic range. In the zero-input case, the filter operates in the manner expected of an externally-linear circuit. However, when a standard linear IC design technique is applied to it, unwanted zero-input sustained oscillations may be observed. Simulations from PSpice and measurement results from a semi-custom realization in a 0.8 μm CMOS process are used to explore this behavior. This work highlights an aspect of the behavior of such filters that must be taken into account by analog designers.
Year
DOI
Venue
2008
10.1007/s10470-011-9599-4
Analog Integrated Circuits and Signal Processing
Keywords
Field
DocType
Square-root domain filters,Companding filters,Limit cycle,Nonlinear dynamics,Analog integrated circuits
Dynamic range,Active filter,Control theory,Computer science,Prototype filter,CMOS,Limit cycle,Electronic engineering,Companding,Integrated circuit design,Transistor
Conference
Volume
Issue
ISSN
68
SP2
0925-1030
Citations 
PageRank 
References 
1
0.36
9
Authors
2
Name
Order
Citations
PageRank
Carlos Aristoteles De La Cruz Blas110.70
Orla Feely29025.65