Title
SystemC-based design space exploration of a 3D graphics acceleration SoC for consumer electronics
Abstract
In order to solve the system performance bottleneck of a 3D graphics acceleration SoC, we exploit design space exploration on performance evaluation and benchmark characteristics using SystemC. We find out the bottleneck according to the simulation results of 9 hardware/software configurations and find out the tradeoffs between different configurations. The performance issues of SoC have been explored under the low-cost constraints, such as cache size effect, hardware accelerations and memory traffic. In conclusions, we provide the performance/cost tradeoffs and 3D graphics benchmark features for designing a 3D graphics SoC.
Year
DOI
Venue
2007
10.1007/978-3-540-77092-3_46
EUC
Keywords
Field
DocType
consumer electronics,performance issue,systemc-based design space exploration,hardware acceleration,graphics soc,system performance bottleneck,cache size effect,cost tradeoffs,benchmark characteristic,performance evaluation,graphics benchmark feature,graphics acceleration soc,3d graphics,transaction level modeling,hardware accelerator,system performance
Bottleneck,3D computer graphics,Computer architecture,Computer science,CPU cache,Transaction-level modeling,Real-time computing,SystemC,Exploit,Software,Design space exploration,Embedded system
Conference
Volume
ISSN
ISBN
4808
0302-9743
3-540-77091-7
Citations 
PageRank 
References 
0
0.34
5
Authors
4
Name
Order
Citations
PageRank
Tse-Chen Yeh1293.03
Tsung-Yu Ho2162.78
Hung-Yu Chen341.17
Ing-Jer Huang420034.40