Name
Abstract | ||
|---|---|---|
The popularity of FPGAs is rapidly growing due to the unique advantages that they offer. However, their distinctive features also raise new questions concerning the security and communication capabilities of an FPGA-based hardware platform. In this paper, we explore the some of the limits of FPGA side-channel communication. Specifically, we identify a previously unexplored capability that significantly increases both the potential benefits and risks associated with side-channel communication on an FPGA: an in-device receiver. We designed and implemented three new communication mechanisms: speed modulation, timing modulation and pin hijacking. These non-traditional interfacing techniques have the potential to provide reliable communication with an estimated maximum bandwidth of 3.3 bit/sec, 8 Kbits/sec, and 3.4 Mbits/sec, respectively. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1145/1950413.1950462 | Symposium on Field Programmable Gate Arrays |
Keywords | Field | DocType |
phase shift,fpga side-channel receiver,reliable communication,thermal,new communication mechanism,timing modulation,fpga side-channel communication,i2c,fpga-based hardware platform,potential benefit,communication capability,side-channel receiver,side-channel communication,new question,ddr2,speed modulation,fpga | Computer science,Parallel computing,Interfacing,Field-programmable gate array,Real-time computing,Modulation,Bandwidth (signal processing),Side channel attack,Embedded system | Conference |
Citations | PageRank | References |
2 | 0.38 | 7 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ji Sun | 1 | 5 | 1.59 |
| Ray Bittner | 2 | 129 | 16.19 |
| Ken Eguro | 3 | 195 | 15.97 |