Name
Abstract | ||
|---|---|---|
Three generations of Alpha microprocessors have been designed using a proven custom design methodology. The performance of these microprocessors was optimized by focusing on high-frequency design. The Alpha instruction set architecture facilitates high clock speed, and the chip organization for each generation was carefully chosen to meet critical paths. Digital has developed six generations of CMOS technology optimized for high-frequency design. Complex circuit styles were used extensively to meet aggressive cycle time goals. CAD tools were developed internally to support these designs. This paper discusses some of the technologies that have enabled Alpha microprocessors to achieve high performance |
Year | DOI | Venue |
|---|---|---|
1998 | 10.1109/4.668981 | Solid-State Circuits, IEEE Journal of |
Keywords | DocType | Volume |
CMOS digital integrated circuits,circuit CAD,integrated circuit design,microprocessor chips,Alpha microprocessor,CMOS technology,Digital,circuit CAD,high-frequency design,instruction set architecture | Journal | 33 |
Issue | ISSN | Citations |
5 | 0018-9200 | 90 |
PageRank | References | Authors |
32.93 | 4 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Paul E. Gronowski | 1 | 248 | 124.25 |
| William J. Bowhill | 2 | 183 | 101.12 |
| Ronald P. Preston | 3 | 305 | 262.84 |
| Michael K. Gowan | 4 | 352 | 89.65 |
| Randy L. Allmon | 5 | 243 | 221.45 |