Title
Design of set-valued logic networks for wave-parallel computing
Abstract
A design for set-valued logic (SVL) networks that provides a solution to interconnection problems in highly parallel VLSI systems is presented. The basic concept is frequency multiplexing of logic values, which enables the parallelism of electrical (or optical) waves to be used for parallel processing. This wave-parallel computing concept is capable of performing several independent binary functions in parallel with a single module. The systematic synthesis of a wave-parallel computing system is discussed, and the possible implementation of SVL networks is addressed
Year
DOI
Venue
1993
10.1109/ISMVL.1993.289547
ISMVL
Keywords
DocType
Citations 
logic circuits,frequency multiplexing,wave-parallel computing,parallel architectures,interconnection problems,binary functions,set-valued logic networks,logic design,highly parallel vlsi,parallel processing,parallel computer,computer architecture,frequency,very large scale integration,optical filters,computer networks
Conference
4
PageRank 
References 
Authors
0.71
3
3
Name
Order
Citations
PageRank
Yasushi Yuminaka15314.45
Takafumi Aoki2915125.99
Tatsuo Higuchi330268.94