Name
Abstract | ||
|---|---|---|
In this paper, power efficiency optimization scheme of charge pump circuit in NAND FLASH memory was proposed. The proposed scheme was implemented in program/erase charge pump by pump stage number control method. The maximum power efficiency of this pump is about 30%, and the maximum point is around 70% point of highest voltage level. So in this paper, to operate program/erase pump in highest power efficiency area, the pump stage number control scheme is proposed and evaluated in 20nm 64Gb MLC NAND FLASH memory circuit. Simulation result shows overall improvement of power efficiency, and at the wafer test about 10mA peak current reduction and overall improvement of power dissipation are found. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1587/elex.8.1343 | IEICE ELECTRONICS EXPRESS |
Keywords | Field | DocType |
NAND FLASH, charge pump, efficiency, current reduction | Nand flash memory,Electrical efficiency,Wafer,Dissipation,Computer science,Voltage,Electronic engineering,Charge pump,Maximum power principle,Peak current,Electrical engineering | Journal |
Volume | Issue | ISSN |
8 | 16 | 1349-2543 |
Citations | PageRank | References |
0 | 0.34 | 1 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sungwook Choi | 1 | 26 | 2.74 |
| DuckJu Kim | 2 | 4 | 1.75 |
| JunSeob Chung | 3 | 0 | 0.34 |
| Bong-Seok Han | 4 | 2 | 1.41 |
| Jea-Gun Park | 5 | 0 | 0.34 |