Name
Abstract | ||
|---|---|---|
We describe single-transistor silicon synapses that compute, learn, and provide non-volatile memory retention. The single transistor synapses simultaneously perform long term weight storage, com(cid:173) pute the product of the input and the weight value, and update the weight value according to a Hebbian or a backpropagation learning rule. Memory is accomplished via charge storage on polysilicon floating gates, providing long-term retention without refresh. The synapses efficiently use the physics of silicon to perform weight up(cid:173) dates; the weight value is increased using tunneling and the weight value decreases using hot electron injection. The small size and low power operation of single transistor synapses allows the devel(cid:173) opment of dense synaptic arrays. We describe the design, fabri(cid:173) cation, characterization, and modeling of an array of single tran(cid:173) sistor synapses. When the steady state source current is used as the representation of the weight value, both the incrementing and decrementing functions are proportional to a power of the source current. The synaptic array was fabricated in the standard 21'm double - poly, analog process available from MOSIS. |
Year | Venue | Field |
|---|---|---|
1994 | NIPS | Topology,Mathematical optimization,Computer science,Hot-carrier injection,Theoretical computer science,Hebbian theory,Learning rule,Steady state,Backpropagation,Transistor,Fabrication,Silicon |
DocType | Citations | PageRank |
Conference | 29 | 7.63 |
References | Authors | |
1 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Paul E. Hasler | 1 | 912 | 154.51 |
| Chris Diorio | 2 | 457 | 82.80 |
| Bradley A. Minch | 3 | 137 | 30.33 |
| Carver Mead | 4 | 137 | 80.28 |