Name
Abstract | ||
|---|---|---|
Chip multiprocessors offer an economical, scalable architecture for future microprocessors. Thread-level speculation support allows them to speed up past software. |
Year | DOI | Venue |
|---|---|---|
2000 | 10.1109/40.848474 | IEEE Micro |
Keywords | Field | DocType |
scalable architecture,stanford hydra cmp,thread-level speculation support,past software,chip multiprocessors,future microprocessors,parallel programming,parallel programming model,chip | Uniprocessor system,Computer architecture,Cache,Computer science,Parallel computing,Real-time computing,Thread (computing),Chip,Multiprocessing,Software,Parallel programming model,Speedup | Journal |
Volume | Issue | ISSN |
20 | 2 | 0272-1732 |
Citations | PageRank | References |
142 | 11.31 | 6 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Lance Hammond | 1 | 520 | 66.61 |
| Benedict A. Hubbert | 2 | 142 | 11.31 |
| Michael Siu | 3 | 142 | 11.31 |
| Manohar K. Prabhu | 4 | 246 | 14.94 |
| Michael Chen | 5 | 180 | 13.55 |
| Kunle Olukotun | 6 | 4532 | 373.50 |