Name
Abstract | ||
|---|---|---|
The 1: track model for fault tolerant 20 processor arrays is extended to 30 mesh architec- tures. Non-intersecting, continuous, straight and non-near miss compensation paths are considered. It is shown that when six directions in the 30 mesh are allowed for compensa- tion paths, then switches with 13 states are needed to preserve the 30 mesh topology after faults. It is also shown that switch reconfiguration after faults is local in the sense that the state of each switch is uniquely determined by the state of the 2 processors connected to it. |
Year | DOI | Venue |
|---|---|---|
1994 | 10.1109/DFTVS.1994.630030 | DFT |
Keywords | Field | DocType |
magnetic resonance,parallel processing,topology,computer science,labeling,fault tolerant,image processing,fault tolerance,switches | Polygon mesh,Computer science,Parallel computing,Real-time computing,Fault tolerance,Control reconfiguration | Conference |
ISBN | Citations | PageRank |
0-8186-6307-3 | 6 | 0.54 |
References | Authors | |
9 | 2 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Anuj Chandra | 1 | 6 | 0.88 |
| Rami G. Melhem | 2 | 174 | 21.11 |