Name
Title | ||
|---|---|---|
A 3bit/cell 32Gb NAND flash memory at 34nm with 6MB/s program throughput and with dynamic 2b/cell blocks configuration mode for a program throughput increase up to 13MB/s. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/ISSCC.2010.5433949 | ISSCC |
Keywords | Field | DocType |
flash memories,logic gates,nanoelectronics,NAND flash memory,bit rate 6 Mbit/s,block configuration mode,optimized programming algorithm,program throughput,quad-plane architecture,size 34 nm,storage capacity 32 Gbit | Asynchronous communication,Logic gate,Flash memory,Computer science,Chip,Electronic engineering,NAND gate,Decoding methods,Page,Throughput,Computer hardware,Embedded system | Conference |
Citations | PageRank | References |
9 | 3.95 | 1 |
Authors | ||
32 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| G. G. Marotta | 1 | 9 | 3.95 |
| A. Macerola | 2 | 9 | 3.95 |
| A. D'Alessandro | 3 | 17 | 5.56 |
| A. Torsi | 4 | 9 | 3.95 |
| C. Cerafogli | 5 | 9 | 3.95 |
| C. Lattaro | 6 | 9 | 3.95 |
| C. Musilli | 7 | 9 | 3.95 |
| D. Rivers | 8 | 9 | 3.95 |
| E. Sirizotti | 9 | 9 | 3.95 |
| F. Paolini | 10 | 9 | 3.95 |
| G. Imondi | 11 | 9 | 3.95 |
| G. Naso | 12 | 9 | 3.95 |
| G. Santin | 13 | 9 | 3.95 |
| L. Botticchio | 14 | 9 | 3.95 |
| L. De Santis | 15 | 9 | 3.95 |
| L. Pilolli | 16 | 9 | 3.95 |
| M. L. Gallese | 17 | 9 | 3.95 |
| M. Incarnati | 18 | 9 | 3.95 |
| M. Tiburzi | 19 | 9 | 3.95 |
| P. Conenna | 20 | 9 | 3.95 |
| S. Perugini | 21 | 9 | 3.95 |
| V. Moschiano | 22 | 9 | 3.95 |
| W. Di Francesco | 23 | 9 | 3.95 |
| Matt Goldman | 24 | 9 | 3.95 |
| Chris Haid | 25 | 9 | 3.95 |
| D. Di Cicco | 26 | 9 | 3.95 |
| D. Orlandi | 27 | 9 | 3.95 |
| F. Rori | 28 | 9 | 3.95 |
| Massimo Rossini | 29 | 18 | 5.31 |
| Tommaso Vali | 30 | 9 | 4.29 |
| R. Ghodsi | 31 | 9 | 3.95 |
| Frank Roohparvar | 32 | 9 | 3.95 |