Title
Using FPLs to Implement a Reconfigurable Highly Parallel Computer
Abstract
With the arrival of large Field Programmable Gate Arrays (FPGAs) it is possible to build an entire computer using only FPGA and memory. In this paper we share some experience from building a highly parallel computer using this concept. Even if today's FPGAs are of considerable size, each processor must be relatively simple if a highly parallel computer is to be constructed from them. Based on our experience of other parallel computers and thorough studies of the intended applications, we think it is possible to build very powerful and efficient computers using bit-serial processing elements with SIMD (Single Instruction stream, Multiple Data streams) control.
Year
DOI
Venue
1992
10.1007/3-540-57091-8_45
FPL
Keywords
Field
DocType
parallel computer,field programmable gate array
Artificial neural network model,Multiple data,Computer architecture,Computer science,Parallel computing,Field-programmable gate array,SIMD,Control unit,Processing element,Artificial neural network,Computer hardware
Conference
ISBN
Citations 
PageRank 
3-540-57091-8
4
0.97
References 
Authors
7
3
Name
Order
Citations
PageRank
Arne Linde140.97
Tomas Nordström210515.82
Mikael Taveniku3173.64