Abstract | ||
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Saturation of CMOS performance has been evident in the present 45/32 nm technology node, because of a variety of physical limitations on the miniaturization. Thus, channel engineering, including the enhancement of drive current due to high mobility channel materials and with robustness against short channel effects and characteristic variation due to multi-gate structures, has currently been recognized as mandatory for high performance CMOS. In this paper, we report our approaches to further improvement of MOSFETs by using strained-Si, SiGe, Ge and semiconductor channels on the Si CMOS platform with an emphasis on the combination of ultra-thin body and multi-gate structures. |
Year | DOI | Venue |
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2009 | 10.1109/CICC.2009.5280866 | PROCEEDINGS OF THE IEEE 2009 CUSTOM INTEGRATED CIRCUITS CONFERENCE |
Keywords | Field | DocType |
strain,effective mass,cmos integrated circuits,nanotechnology,logic gates,short channel effect,silicon | Logic gate,Computer science,Communication channel,Electronic engineering,CMOS,Robustness (computer science),Miniaturization,MOSFET,Electrical engineering,Semiconductor,Silicon-germanium | Conference |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
1 |
Name | Order | Citations | PageRank |
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Shinichi Takagi | 1 | 3 | 9.69 |