Name
Title | ||
|---|---|---|
Designing Resistant Circuits against Malicious Faults Injection Using Asynchronous Logic |
Abstract | ||
|---|---|---|
This paper presents hardening techniques against fault attacks and the practical evaluation of their efficiency. The circuit technology investigated to improve the resistance against fault attacks is asynchronous logic. Specific properties of asynchronous circuits make them inherently resistant against a large class of faults. An analysis of their behavior in the presence of faults shows that they are an interesting alternative to design robust systems. A behavior diagnosis enables us to propose hardening techniques that improve fault tolerance and resistance. They are applied at design time and aim at exploiting quasi-delay insensitive (QDI) circuit properties to significantly harden the architecture with a very low area overhead and a reasonable performance penalty. To validate these techniques, a hardened DES crypto-processor is presented. The countermeasures are evaluated using laser beam fault injection. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/TC.2006.143 | IEEE Trans. Computers |
Keywords | Field | DocType |
laser beam fault injection,asynchronous logic,malicious faults injection,designing resistant circuits,design time,fault attack,asynchronous circuit,circuit property,behavior diagnosis,hardening technique,circuit technology,fault tolerance,fault tolerant,cryptography,logic circuits,network synthesis,integrated circuit design | Stuck-at fault,Asynchronous communication,Logic gate,Computer science,Real-time computing,Integrated circuit design,Fault tolerance,Electronic circuit,Fault injection,Asynchronous circuit,Embedded system | Journal |
Volume | Issue | ISSN |
55 | 9 | 0018-9340 |
Citations | PageRank | References |
18 | 0.84 | 12 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| yannick monnet | 1 | 82 | 6.84 |
| Marc Renaudin | 2 | 498 | 49.15 |
| Regis Leveugle | 3 | 18 | 1.85 |