Year | DOI | Venue |
---|---|---|
2013 | 10.1109/RSP.2013.6683953 | RSP |
Keywords | Field | DocType |
field programmable gate arrays,hardware description languages,logic CAD,network routing,FPGA CAD flow,FPGA architecture,Odin II,VTR CAD flow,VTR project,Verilog synthesis,computer aided design,field programmable gate array device,hardware mapping,high level Verilog hardware description,logical synthesis,programmed soft logic block,routing structure,visual exploration | CAD,Netlist,Computer architecture,Visualization,Computer science,Programmable logic array,Field-programmable gate array,Verilog,Register-transfer level,Hardware description language | Conference |
Citations | PageRank | References |
1 | 0.37 | 0 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Konstantin Nasartschuk | 1 | 128 | 7.93 |
Rainer Herpers | 2 | 73 | 19.86 |
Kenneth B. Kent | 3 | 458 | 54.42 |