Title | ||
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New Fpn Correction Method For Pd-Storage Dual-Capture Cmos Image Sensor Using A Nonfully Depleted Pinned Photodiode |
Abstract | ||
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This paper proposes a novel fixed pattern noise (FPN) reduction technique for a PD-storage dual-capture image sensor based on the 4-tansistor pixel structure. The knee-point calibration method using a nonfully depleted photodiode by controlling the transfer voltage is proposed, without any modification of the pixel structure or addition of circuit components. The prototype sensor is fabricated using a 0.13 mu m CIS process. The chip includes a 320 x 240 pixel array with a 2.25 mu m pixel pitch. The measurement results show that the proposed technique successfully reduces the FPN by 66% while preserving the inherent performance advantages of the PD-storage dual-capture CMOS image sensor. |
Year | DOI | Venue |
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2012 | 10.1109/ISCAS.2012.6271565 | 2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012) |
Keywords | Field | DocType |
lighting,dynamic range,photodiodes,calibration,noise | Fixed-pattern noise,Dot pitch,Dynamic range,Image sensor,Computer science,Chip,CMOS sensor,Electronic engineering,Pixel,Photodiode | Conference |
ISSN | Citations | PageRank |
0271-4302 | 1 | 0.39 |
References | Authors | |
0 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Jiwon Lee | 1 | 13 | 2.81 |
Inkyu Baek | 2 | 1 | 0.72 |
Kyounghoon Yang | 3 | 5 | 2.22 |