Name
Abstract | ||
|---|---|---|
The Draft architecture is a 256 bit system design for extended precision integer arithmetic. It is intended primarily for high speed factoring of large integers. Major architectural features include a segmentable RDO which allows parallel computations in up to eight independent All segments. Each segment operates from a local control store with a common micro-instruction address broadcast to all segments by a single sequencer. Execution of the current operation by the segment is conditional on the operation selected and the status of a local condition code. A micro-program development environment including micro-assembler and simulator has been implemented. A prototype DRAFT machine is currently under construction. |
Year | DOI | Venue |
|---|---|---|
1985 | 10.1145/320599.322559 | ACM Conference on Computer Science |
Keywords | Field | DocType |
large integer,extended precision integer arithmetic,bit system design,common micro-instruction address broadcast,major architectural feature,current operation,factoring tests,dynamically reconfigurable architecture,high speed factoring,local control store,draft architecture,local condition code,portability,parallel computer,grammars,semantics,system design,compilers,syntax,error correction | Computer science,Condition Code,256-bit,Systems design,Control store,Compiler,Theoretical computer science,Software portability,Factoring,Extended precision | Conference |
ISBN | Citations | PageRank |
0-89791-150-4 | 0 | 0.34 |
References | Authors | |
1 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Donald M. Chiarulli | 1 | 213 | 24.91 |
| Walter G. Rudd | 2 | 16 | 4.73 |
| Ducan A. Buell | 3 | 0 | 0.34 |