Title
Automatic tuning technique exploring within the hardware-specific constrained parameters
Abstract
This paper covers an efficient strategy for exploring the sampling parameters on auto-tuning processes. Byte/flop is considered as a performance indicator, and finding the best parameter is interpreted as an optimisation problem with some hardware-specific constrained conditions. In this work, we also evaluate the performance of various unrolled loops both in a rank-update operation and a matrix-vector multiplication which appear in a significant operation of an eigensolver. The tuned routines running on a single processor of a Hitachi SR8000 and a Fujitsu VPP5000 record 1080 MFLOPS and 8342 MFLOPS respectively.
Year
DOI
Venue
2005
10.1007/11666806_47
LSSC
Keywords
Field
DocType
hitachi sr8000,significant operation,rank-update operation,automatic tuning technique,optimisation problem,efficient strategy,auto-tuning process,matrix-vector multiplication,best parameter,fujitsu vpp5000 record,performance indicator
Byte,Performance indicator,Matrix calculus,FLOPS,Computer science,Parallel computing,Algorithm,Automatic tuning,Multiplication,Sampling (statistics),Grid
Conference
Volume
ISSN
ISBN
3743
0302-9743
3-540-31994-8
Citations 
PageRank 
References 
0
0.34
4
Authors
2
Name
Order
Citations
PageRank
Toshiyuki Imamura19522.21
Ken Naono285.74