Name
Title | ||
|---|---|---|
Architecture Of Via Programmable Logic Using Exclusive-Or Array (Vpex) For Eb Direct Writing |
Abstract | ||
|---|---|---|
In this paper, we propose the novel architecture of VCLD (Via Configurable Logic Device) called VPEX (Via Programmable Logic using Exclusive-or array) which is optimized for Electron Beam (EB) direct writing. The logic element (LE) or VPEX consists of complex gate type EXclusive OR (EXOR) and Inverter (NOT) gates. The single LE can output 12 logics which include all 2-inputs logic functions (NAND, NOR, AND, Of bubble AND, bubble OR, XOR, XNOR), 3 inputs AOI21 and inverted-output multiplexer (MUXI) by changing via-1 layout. Scan D-FlipFlop can be composed by using 5 LEs. The logic of each LE can be defined by double EB exposure using "character beam". The speed performance of VPEX is much better than that of FPGAs, and 1.5 times worse than that of ASICs. We believe that the combination of VPEX architecture and Ell direct writing is the best solution for low-volume production LSIs. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/CICC.2007.4405728 | PROCEEDINGS OF THE IEEE 2007 CUSTOM INTEGRATED CIRCUITS CONFERENCE |
Keywords | Field | DocType |
via-configurable logic, via-programmable logic, electron-beam direct writing, low volume production, exclusive OR, structured ASIC, look-up table | Logic synthesis,Inverter,XNOR gate,Exclusive or,Computer science,Field-programmable gate array,Electronic engineering,NAND gate,Multiplexer,Programmable logic device | Conference |
Citations | PageRank | References |
0 | 0.34 | 3 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| NAKAMURA Akihiro | 1 | 0 | 0.34 |
| Masahide Kawaharazaki | 2 | 0 | 0.34 |
| Masaya Yoshikawa | 3 | 25 | 23.93 |
| Takeshi Fujino | 4 | 16 | 8.98 |