Name
Abstract | ||
|---|---|---|
This letter proposes a low-power tournament branch predictor, in which the number of accesses to the branch predictors (local predictor or global predictor) is reduced. Analysis results with Samsung Memory Compiler show that the proposed branch predictor reduces the power consumption by 24-45%, compared to the conventional tournament branch predictor, not requiring any additional storage arrays, not incurring any additional delay and never harming accuracy. |
Year | Venue | Keywords |
|---|---|---|
2004 | IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS | microarchitecture, tournament branch predictor, local history, global history, low-power design, memory compiler |
Field | DocType | Volume |
Computer vision,Tournament,Computer science,Parallel computing,Local history,Theoretical computer science,Artificial intelligence,Branch predictor,Microarchitecture | Journal | E87D |
Issue | ISSN | Citations |
7 | 1745-1361 | 0 |
PageRank | References | Authors |
0.34 | 0 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sung Woo Chung | 1 | 363 | 34.87 |
| Gi-Ho Park | 2 | 76 | 17.47 |
| Sungbae Park | 3 | 49 | 10.97 |