Paper Info
Title
Adapting communication for adaptable processors: A multi-axis reconfiguration approach.
Abstract
The increasing power density found in newer manufacturing technologies dictates that it is no longer possible for the whole chip to operate at full capacity the entire time. Adaptable systems must be devised to dynamically throttle their power consumption while maintaining the high performance expected by users. Furthermore, adapting processing and memory capacities leads to variable requirements of the communication infrastructure. Thus, in order to find the best solutions in the available design space, adaptability should be applied concordantly to three system axes: processing, memory and communication. In this work, we present the case for an architecture able to dynamically adapt its performance in all such layers. We focus on providing and adaptable Network-on-Chip able to dynamically meet the requirements of a reconfigurable processor.
Year
DOI
Venue
2012
10.1109/ReConFig.2012.6416726
ReConFig
Keywords
Field
DocType
integrated circuit design,multiprocessing systems,network-on-chip,reconfigurable architectures,MPSoC,VLIW processors,adaptable processors,adaptable systems,communication adaptation,communication axes,communication infrastructure,design space,manufacturing technologies,memory axes,memory capacities,multiaxis reconfiguration approach,multiprocessor systems-on-chip,network-on-chip,power consumption,power density,processing axes,reconfigurable processor,Multiprocessor System on Chip,Network-on-Chip,Power Consumption,VLIW processor
Adaptability,Architecture,Computer science,Parallel computing,Network on a chip,Distributed memory,Real-time computing,Chip,Integrated circuit design,Throttle,Control reconfiguration,Embedded system
Conference
ISSN
Citations 
PageRank 
2325-6532
0
0.34
References 
Authors
0
5
Name
Order
Citations
PageRank
Paulo C. Santos1305.92
Gabriel L. Nazar25512.83
Luigi Carro31393166.42
Fakhar Anjam4313.63
Stephan Wong58912.74