Name
Title | ||
|---|---|---|
Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures |
Abstract | ||
|---|---|---|
The Scalable Communications Core (SCC) is a power- and area-efficient solution for physical layer (PHY) and lower MAC processing of concurrent multiple wireless protocols. Our architecture consists of coarse-grained, heterogeneous, programmable accelerators ... |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/ISVLSI.2007.56 | ISVLSI |
Keywords | Field | DocType |
CMOS integrated circuits,carbon nanotubes,field programmable gate arrays,integrated circuit design,integrated circuit interconnections,logic design,CMOS technology,FPGA architectures,FPGA routing fabric,FPGA timing yield,carbon nanotube bundle interconnect,copper interconnect,field programmable gate arrays,process variations,single-walled carbon nanotubes,statistical variations | Logic synthesis,Computer science,Field-programmable gate array,CMOS,Copper interconnect,Electronic engineering,Integrated circuit design,Interconnection,Electrical engineering,RLC circuit,Bundle | Conference |
ISSN | ISBN | Citations |
2159-3469 | 0-7695-2896-1 | 1 |
PageRank | References | Authors |
0.39 | 4 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| S. Eachempati | 1 | 358 | 15.79 |
| Narayanan Vijaykrishnan | 2 | 6955 | 524.60 |
| Arthur Nieuwoudt | 3 | 207 | 20.59 |
| Yehia Massoud | 4 | 772 | 113.05 |