Name
Abstract | ||
|---|---|---|
System-level and Platform-based design, along with Transaction Level modeling (TLM) techniques and languages like SystemC, appeared as a response to the ever increasing complexity of electronics systems design, where complex SoCs composed of several modules integrated on the same chip have become very common. In this scenario, the exploration and verification of several architecture models early in the design flow has played an important role. This paper proposes a mechanism that relies on computational reflection to enable designers to interact, on the fly, with platform simulation models written in SystemC TLM. This allows them to monitor and change signals or even IP internal register values, thus injecting specific stimuli that guide the simulation flow through corner cases during platform debugging, which are usually hard to handle by standard techniques, thus improving functional coverage. The key advantages of our approach are that we do not require code instrumentation from the IP designer, do not need a specialized SystemC library, and not even need the IP source code to be able to inspect its contents. The reflection mechanism was implemented using a C++ reflection library and integrated into a platform modeling framework. We evaluate our technique through some platform case studies. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1145/1289816.1289838 | CODES+ISSS |
Keywords | Field | DocType |
ip source code,computational reflection mechanism,ip designer,computational reflection,platform debugging,platform case study,platform simulation model,platform-based design,ip internal register value,platform modeling framework,systemc tlm,transaction level modeling,system level design,debugging,registers,system design,source code,design flow,hardware,system on chip,system architecture,chip,soc,dictionaries,source coding,systems analysis | Computer architecture,Instrumentation (computer programming),System on a chip,Computer science,Electronic system-level design and verification,Transaction-level modeling,Real-time computing,SystemC,Design flow,Platform-based design,Debugging,Embedded system | Conference |
Citations | PageRank | References |
5 | 0.56 | 5 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Bruno Albertini | 1 | 18 | 3.42 |
| Sandro Rigo | 2 | 185 | 24.91 |
| Guido Araujo | 3 | 40 | 5.23 |
| Cristiano Araujo | 4 | 83 | 6.23 |
| Edna Barros | 5 | 5 | 0.56 |
| Willians Azevedo | 6 | 5 | 0.56 |