Paper Info
Title
Martini: A Network Interface Controller Chip for High Performance Computing with Distributed PCs
Abstract
In this paper, “Martini,” a network interface controller chip for our original network called RHiNET is described. Martini is designed to provide high-bandwidth and low-latency communication with small overhead. To obtain high performance communication, protected user-level zero-copy RDMA communication functions are completely implemented by a hardwired logic. Also, to reduce the communication latency efficiently, we have proposed PIO-based communication mechanisms called “On-the-fly (OTF)” and have implemented them on Martini. The evaluation results show that Martini connected to a 64bit/66MHz PCI-bus achieves 470MByte/s maximum bidirectional bandwidth and 1.74 μsec minimum latency on host-to-host memory copying.
Year
DOI
Venue
2007
10.1109/TPDS.2007.1064
IEEE Trans. Parallel Distrib. Syst.
Keywords
Field
DocType
pio-based communication mechanism,hardwired logic,evaluation result,low-latency communication,high performance computing,network interface controller chip,high performance communication,sec minimum latency,user-level zero-copy rdma communication,communication latency,original network,low latency,network interface controller,tcpip,process control,bandwidth,protocols,chip,network interfaces,network topology,distributed computing
System area network,Supercomputer,Computer science,Network topology,Chip,Real-time computing,Bandwidth (signal processing),Remote direct memory access,Network interface controller,Distributed computing,Network interface,Embedded system
Journal
Volume
Issue
ISSN
18
9
1045-9219
Citations 
PageRank 
References 
3
0.58
28
Authors
8
Name
Order
Citations
PageRank
Konosuke Watanabe1686.93
Tomohiro Otsuka2384.71
Junichiro Tsuchiya3151.95
Hiroaki Nishi423741.20
Junji Yamamoto5546.88
Noboru Tanabe67914.28
Tomohiro Kudoh734450.92
Hideharu Amano81375210.21