Title
An Area-efficient VLSI Implementation of CA-2D-VLC Decoder for AVS
Abstract
Context-based adaptive 2D-VLC (CA-2D-VLC) is adopted by AVS. In this paper, we present an area-efficient VLSI implementation of CA-2D-VLC decoder. Data compression storage (DCS) method is proposed in memory optimization for VLC tables and a reduction of 30% in on-chip memory cost is achieved. Furthermore, an Exp-Golomb decoder is developed with codeword segmentation decoding (CSD) method, which saves 70% hardware cost compared with the prior work. Synthesized with 0.18 mum CMOS standard-cell library, the overall hardware cost of the proposed CA-2D-VLC decoder is 1540 gates at the clock frequency constraint of 180MHz. With an average throughput of one symbol per cycle, the proposed design is suitable for cost-aware and high-resolution AVS video decoding applications. Though designed for AVS originally, the proposed architecture can be adapted to other coding standards easily.
Year
DOI
Venue
2007
10.1109/ISCAS.2007.378099
ISCAS
Keywords
Field
DocType
cmos integrated circuits,avs video decoding,cmos standard-cell library,context-based adaptive 2d-vlc,vlc tables,data compression storage,codeword segmentation decoding,vlsi,video coding,memory optimization,area-efficient vlsi implementation,ca-2d-vlc decoder,180 mhz,exp-golomb decoder,0.18 micron,cost reduction,decoding,cost function,very large scale integration,data compression,hardware,chip,high resolution
Computer science,CMOS,Electronic engineering,Code word,Soft-decision decoder,Decoding methods,Throughput,Data compression,Very-large-scale integration,Clock rate,Embedded system
Conference
ISSN
ISBN
Citations 
0271-4302
1-4244-0921-7
3
PageRank 
References 
Authors
0.51
2
3
Name
Order
Citations
PageRank
Ke Zhang1115.51
Xiaoyang Wu230.51
Lu Yu344455.90