Name
Abstract | ||
|---|---|---|
This paper reports new accurate and scalable behavioral modeling for novel 3D field-programmable ESD protection circuits using Verilog-A, which enables post-Si on-chip and in-system ESD protection design simulation and verification. New field-programmable ESD protection devices were fabricated in CMOS-compatible processes utilizing SONOS and nano crystal dots structures. The ESD behavior models were developed from ESD testing results and verified in SPICE circuit simulation. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/CICC.2013.6658492 | CICC |
Keywords | Field | DocType |
CMOS memory circuits,circuit simulation,electrostatic discharge,integrated circuit design,integrated circuit modelling,integrated circuit reliability,random-access storage,semiconductor device models,semiconductor device reliability,3D field-programmable ESD protection structures,CMOS-compatible processes,ESD testing,SONOS structures,SPICE circuit simulation,Verilog-A,electrostatic discharge,in-system ESD protection design simulation,nanocrystal dots structures,post-Si on-chip,scalable behavior modeling,silicon-oxide-nitride-oxide-silicon structures | Computer science,Spice,Electrostatic discharge,Behavioral modeling,Circuit design,Electronic engineering,Integrated circuit design,Electronic circuit,Embedded system,Scalability | Conference |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
9 | ||