Title
A low-power inverter-based ΣΔ analog-to-digital converter for audio applications.
Abstract
This paper presents a design for a low-power, high-resolution audio ΣΔ analog-to-digital converter (ADC) based on a novel gain-boost class-C inverter. The gain-boost class-C inverter behaves as a sub-threshold amplifier, thereby minimizing power dissipation. The proposed ADC chip is fabricated in a SMIC 65-nm CMOS process with a die area of 0.63 mm2. With 1.2 V of supply voltage, the ADC chip achieves a peak signal-to-noise-plus-distortion-ratio (SNDR) of 92 dB and a dynamic range (DR) of 97 dB over the 20 kHz audio band, consuming only 1.13 mW. These results make the ADC particularly suitable for portable electronics applications.
Year
DOI
Venue
2014
10.1007/s11432-013-4999-y
SCIENCE CHINA Information Sciences
Keywords
Field
DocType
ΣΔ ADC, class-C inverter, low-power, high-resolution, gain-boost
Inverter,Dynamic range,Control theory,Effective number of bits,Analog-to-digital converter,Chip,Successive approximation ADC,Power inverter,Electrical engineering,Mathematics,Amplifier,Embedded system
Journal
Volume
Issue
ISSN
57
4
1869-1919
Citations 
PageRank 
References 
11
0.36
6
Authors
6
Name
Order
Citations
PageRank
Xiaopeng Liu1110.36
Yan Han2121.77
Xiaoxia Han3517.95
Hao Luo4301.77
Ray C. C. Cheung562572.26
Tianlin Cao6312.50