Name
Abstract | ||
|---|---|---|
The paper addresses the need for a compact axonal delay circuit for analogue hardware neural networks. The delay is implemented using the charging of a capacitive node via a pMOSFET operating in sub-threshold. The duration of the delay can be programmed by adjusting the associated MOSFET gate voltage and delays spanning five orders of magnitude, between microseconds and tens of milliseconds are shown experimentally. A model is reported that allows for prediction of the delay. This analysis is supported by experimental results from circuits fabricated in AMS 0.35μm CMOS. An approach for integration of the axon circuit into a neuron circuit is also considered, where both single and burst spikes are possible. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1016/j.neucom.2012.12.004 | Neurocomputing |
Keywords | Field | DocType |
Neural network hardware,Delay circuits,Neuromorphic engineering | Computer science,Neuromorphic engineering,Capacitive sensing,CMOS,Millisecond,Artificial intelligence,Spiking neural network,MOSFET,Artificial neural network,Electronic circuit,Machine learning | Journal |
Volume | ISSN | Citations |
108 | 0925-2312 | 1 |
PageRank | References | Authors |
0.35 | 4 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Thomas Dowrick | 1 | 18 | 2.47 |
| Steve Hall | 2 | 65 | 6.14 |
| Liam Mcdaid | 3 | 270 | 30.48 |